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150 IP
101
0.118
LVDS Tx IO IP, UMC 0.35um Logic process
0.13um LVDS TX IO PAD, UMC 0.13um HS/HVT-FSG process....
102
0.0
1 Gbps LVDS Transmitter
The interface to the core logic includes signal pin (INP) to transmit data and control pin ( EN) to configure the state of the transmitter. There are ...
103
0.0
2 Gbps Rail to Rail LVDS receiver
065TSMC_LVDS_10 is LVDS receiver with rail to rail input range. EN_T enables 100 Ohm internal resistor. The CAL_T adjusts 100 Ohm internal resistor, t...
104
0.0
V-by-One Tx IP, Silicon Proven in SMIC 40LL
V-by-One HS technology targets a high-speed data transmission of video signals based on the internal connection of equipment. V-by-One® HS Standard de...
105
0.0
3.125 Gbps DDR 1-channel CML transmitter
065TSMC_CML_02 core logic interface includes signal pins (INP1, INP2 and INN1, INN2) for data transmission, control pin EN_TX to configure transmitter...
106
0.0
3.125 Gbps DDR CML receiver
065TSMC_CML_01 core logic interface includes complementary output signal pins (OUTp, OUTn) for data transmission and enable pin EN_RX. PAD_INP and PAD...
107
0.0
1.2 Gbps LVDS transmitter/receiver
The interface to the core logic in receiver mode includes the signal pins (out_p and out_n) to receive data and the control pins (en_rx, ten, t_cal ar...
108
0.0
1.8V Secondary Oxide LVDS pad - TSMC 7nm 7FF,FF+
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
109
0.0
200 Mbps LVDS IP library
055TSMC_LVDS_03 is a library including: • Transmitter LVDS driver (TX_LVDS); • Receiver LVDS driver (RX_LVDS); • Reference current/voltage genera...
110
0.0
500Mbps LVDS IP library
180TSMC_LVDS_10 is a library including: • Transmitter LVDS driver (TX_LVDS); • Receiver LVDS driver (RX_LVDS); • Transceiver LVDS driver (R...
111
0.0
Rail to rail LVDS receiver 1 Gbps
LVDS_RX is LVDS receiver with rail to rail input range. The interface to the core logic includes the output signal pin (OUTp) to receive data and the ...
112
0.0
IGALVDT11A, TSMC CLN28HPC+/HPC/HPM LVDS RX PHY [8ch]
The IGALVDT11A is a TSMC CLN28HPC+/HPC/HPM 8-channel LVDS receiver PHY, which is used mainly in baseband IC and RFIC communication. An internal deskew...
113
0.0
IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O
IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O...
114
0.0
IGALVDT14A, TSMC CLN28HPC+ LVDS RX and CMOS Combo I/O
IGALVDT14A contains a receiver (RX) for LVDS interface and bi-derectional double CMOS. It supports the data rate up to 500Mbps. There is one macro ins...
115
0.0
Bi-Directional LVDS with LVCMOS
BiDirectional LVDS IO circuit combines LVDS driver and receiver circuits to enable a single pair of IO pads to function as a 1.5Gbps bi-directional LV...
116
0.0
Library of LVDS IOs cells for TSMC 40G
The nSIO2000_TS40G_2V5_0V9 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/0.9V or 1.8V/0.9V, designed o...
117
0.0
Library of LVDS IOs cells for TSMC 65GP
The nSIO2000_TS65GP_2V5_1V0 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.0V or 1.8V/1.0V, designed ...
118
0.0
Library of LVDS Ios cells in HHGrace 130nm~55nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
119
0.0
Library of LVDS Ios cells in HLMC 28nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
120
0.0
Library of LVDS Ios cells in SMIC 130nm~28nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
121
0.0
Library of LVDS Ios cells in TSMC 180nm~22nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
122
0.0
Wide-range LVDS Video Interface
Flexible video deserializer capable of receiving 18bit, 24bit, and 30bit video data with embedded sync and control carried over four or five serial LV...
123
0.0
Eight Channel (8CH) LVDS Serializer in Samsung 28FDSOI
The 28FDSOI-LVDS-1250-8CH-TX-PLL is a high performance 8-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parall...
124
0.0
Four Channel (4CH) LVDS Receiver in TSMC 40LP
The MXL-LVDS-4CH-RX-T-40LP is a high-performance 4-channel LVDS Receiver implemented using digital CMOS technology. Both the serial and parallel data ...
125
0.0
Four Channel (4CH) LVDS Serializer in Samsung 28FDSOI
The 28FDSOI-LVDS-4CH-TX-1250-PLL is a high performance 4-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parall...
126
0.0
Four Channel LVDS Serializer in TSMC 130nm
The MXL-SR-LVDS-4CH7-130 is a high performance 4-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parallel data ...
127
0.0
Up to 1.25 Gbps DDR LVDS IPs library
130TSMC_LVDS_04 is a library including: • Transmitter LVDS driver (LVDS_TX); • Receiver LVDS driver (LVDS_RX); • Bandgap reference block (LVDS_BG)...
128
0.0
TSMC 40G 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G te...
129
0.0
TSMC 40G 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G technology....
130
0.0
TSMC 40G 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G technology....
131
0.0
TSMC 40G Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/0.9V o...
132
0.0
TSMC 40LP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 LP t...
133
0.0
TSMC 40LP 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 LP technology....
134
0.0
TSMC 40LP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 LP technology....
135
0.0
TSMC 40LP Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/1.1V o...
136
0.0
TSMC 65GP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.0V or 1.8V/1.0V, designed on the TSMC 65 GP t...
137
0.0
TSMC 65GP 2Gb/s RX LVDS IO cell
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138
0.0
TSMC 65GP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.0V or 1.8V/1.0V, designed on the TSMC 65 GP technology....
139
0.0
TSMC 65GP Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/1.0V o...
140
0.0
TSMC 65LP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.2V or 1.8V/1.2V, designed on the TSMC 65 LP t...
141
0.0
TSMC 65LP 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/1.2V or 1.8V/1.2V, designed on the TSMC 65 LP technology....
142
0.0
TSMC 65LP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.2V or 1.8V/1.2V, designed on the TSMC 65 LP technology....
143
0.0
TSMC 65LP Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/1.2V o...
144
0.0
LVDS IO in SMIC 28HKC+, upto 1.6Gbps
LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...
145
0.0
LVDS IO in SMIC 40NLL, upto 800Mbps
LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...
146
0.0
LVDS IO Pad Set
The LVDS I/O is a three-module design (input, output and reference block). The LDP_OU_675_25V_T is a 2GBit/s LVDS Driver, LDP_IN_675_25V_DN is a 2GBit...
147
0.0
LVDS Rx IP, Silicon Proven in GF 28LPe
A physical layer IP for LVDS Receiver. This IP consists of 20-lane (4 x 4D1C) LVDS receivers and supports up to 1.5Gbps data rate. The input clock is ...
148
0.0
LVDS/ MIPI Combo PHY IP, Silicon Proven in SMIC 40LL
The MIPI-LVDS Combo Tx IP is designed for chips that perform high bandwidth data communication while operating at low power consumption. It can be eas...
149
0.0
LVDS/FPD Link IP, Silicon Proven in GF 28LPe
A physical layer IP for LVDS transmitter. This IP consists of 20-lane (4 x 4D1C) LVDS drivers and supports up to 1.5Gbps data rate. In LVDS mode, both...
150
0.0
LVDS/FPD Link IP, Silicon Proven in GF 65/55LPe
A transmitter for LVDS with a physical layer IP. This IP has 20 lanes (4 x 4D1C) of LVDS drivers and can handle 1.5Gbps of data rate. Both serial and ...